Computer systems typically comprise a combination of hardware, such as semiconductors, transistors, chips, and circuit boards, and computer programs. As increasing numbers of smaller and faster transistors can be integrated on a single chip, new processors are designed to use these transistors effectively to increase performance. The arising challenge is to find the most effective way to put these transistors to use. Currently, many computer designers opt to use the increasing transistor budget to build ever bigger and more complex uni-processors. Alternatively, multiple processor cores can be placed on a single chip.
Placing multiple smaller processor cores on a single chip is attractive because a single, simple processor core is less complex to design and verify. This results in a less costly and complex verification process, as a once verified module, the processor, is repeated multiple times on a chip. A way to take advantage of the multi-processors is to partition sequential computer programs into threads and execute them concurrently and speculatively, on the multiple processors. Thus, a speculative multi-threaded processor consists logically of replicated processor cores that cooperatively perform the parallel execution of a sequential program.
Computer programs often use data structures that must be shared among the multiple threads, resulting in frequent concurrent reads of and writes to the shared data structures. A hardware transactional memory system provides a model for constructing multi-threaded programs that need to control access to shared data structures. These systems allow computer programs executing in one thread to optimistically assume that shared data structures can be updated without conflict with the accesses and updates of other threads of execution. The speculative updates to memory are kept pending until the transactional memory system confirms that no conflicts with storage accesses of other threads have occurred. The hardware transactional memory system discards the pending speculative updates when conflicts between the storage accesses of multiple threads are detected.